Design Rule Checking (DRC) is an area of Electronic Design Automation that determines whether integrated circuit (IC) features on a physical layout design satisfy a series of geometric connectivity requirements called “Design Rules” (or “DRCs”). Some example design rules verify whether there is sufficient spacing between an edge of one active area and an edge of an adjacent active area in the design, or whether there is sufficient spacing between an edge of one well region and an edge of an adjacent well region in the design. If these well regions are “too close” to one another (i.e., closer than minimum DRC requirements), unavoidable and small random manufacturing variations can cause some ICs, when actually manufactured, to fail to meet minimum performance metrics specified by the designer. Therefore, if one or more features on a physical layout design are not in compliance with DRC rules, DRC software flags an error so a designer can go back and make the physical layout design more “robust” prior to it being manufactured, so the final manufactured IC will meet design specifications even when manufacturing variations are encountered.
However, as technology advances to ever-smaller geometries, DRC-checking, although still an important step in the IC design process, is not in-and-of-itself a completely accurate predictor of whether manufactured ICs will meet yield specifications. For example, in many regards, DRC checking fails to account for variations in photolithography, variations in etching, variations in chemical mechanical polishing (CMP), and variations in mask manufacturing, among others. Because of this, modern IC design flows can have separate process checks in addition to DRC-checking for many parts of the manufacturing process.